Industry Links and Terms
International Microelectronics and Packaging Society (IMAPS)
| Ag | Silver |
| Al | Aluminum |
| Au | Gold |
| Bare Die | Unpackaged integrated circuit die |
| Bumped Die | Unpackaged integrated circuit that has interconnect material formed in contact with the I/O to allow flip-chip attachment. |
| COB (Chip on Board) | A bare die that is attached to a rigid substrate face up and electrically interconnected to the substrate using wire bond technology. |
| COF (Chip on Flex) | A bare die that is attached to a flexible laminate substrate active side up and electrically interconnected to the substrate,using wire bond technology. |
| CSP | Chip Scale Package |
| C4 | Controlled-Collapse Chip Connection |
| DCA | Direct Chip Attachment |
| DPC | Die Product Consortia |
| EMI | Electromagnetic Interference |
| ESD | Electrostatic Discharge |
| Eutectic Solder | 63% Tin, 37% Lead |
| FCP | Few Chip Package |
| Film Frame | Sawn wafer on sticky tape supported by a metal frame |
| Flip Chip | A method for electrically interconnecting unpackaged die active side down with a conductive bump to the substrate. |
| Gel-Pak® | Plastic trays used to ship unpackaged die. The die is held in place by surface tension of membrane. A vacuum chuck is,required to reduce surface tension and remove die. |
| HDI | High Density Interconnect |
| I/O | Input/Output |
| IC | Integrated Circuit |
| JEDEC | Joint Electronic Device Engineering Council |
| LTCC | Low-Temperature Co-fired Ceramic |
| MCM | Multi-Chip Module |
| MCP | Multi-Chip Package |
| MIL-STD-883 | Military standard defining test methods and process procedures for microelectronic devices |
| Mv | Microvia technology creates a PC board via of <=150um (typically by non-mechanical means) and uses built-up multi-layer processes. |
| uBGA | Micro Ball Grid Array package |
| uSMD | Micro Surface Mount Device |
| Pb | Lead |
| PWB | Printed Wiring Board |
| RF | Radio Frequency |
| S Level | Wafer fabrication processing and quality requirements per MIL-PRF-38535 |
| SCD | Source Control Drawing |
| SEM | Scanning Electron Micrograph |
| SiP | System in a Package |
| SOC | System on a Chip |
| SMD | Surface-Mount Device |
| Sn | Tin |
| SPC | Statistical Process Control |
| TAB | Tape Automated Bonding |
| Tape on Reel | A high volume automated shipping method for automated assembly processing available on 7″ or 13″ reels |
| Tg | Glass transition temperature |
| UBM | Under Bump Metallurgy |
| UV | Ultraviolet |
| Waffle Packs | Plastic trays with individualized pockets designed for a specific die size |
| Wirebond | A method for electrically connecting the die bond pad to the substrate trace typically using Au or Al bond wires |
| WL-CSP | Wafer-Level Chip Scale Package |
| WLP | Wafer-Level Packaging |